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SCSI Terminology |
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A | B | C | D | E | F | G | H | I | J | K | L | M | N | O | P | Q | R | S | T | U | V | W | X | Y | Z [back to SCSI Terminology index page] M___________________________ Magneto-Optical Mainboard Mainframe Main Memory Mastering Max Out Mb Mbps MCA (Micro Channel Architecture) MDRAM Another advantage of MDRAM is that memory can be configured in smaller increments, which can reduce the cost of some components. For example, it's possible to produce MDRAM chips with 2.5 MB, which is what is required by video adapters for 24-bit color at a resolution of 1,024x768. With conventional memory architectures, it's necessary to jump all the way to 4 MB. Currently, MDRAM is used in some video adapters and graphics accelerators. Megabyte Megahertz (Mhz) Memory MHz Micro Channel Architecture Micro Channel brought many mainframe computer design ideas to PC bus expansion and absolved many of the original sins of the PC bus. Micro Channel's architects completely redesigned the bus with high speed operation in mind, relocating and redefining signals. Unlike the PC and AT buses, the Micro Channel put a ground or power supply conductor within three pins of every signal to shield against radio frequency interference. Most importantly, Micro Channel took bus control from the system microprocessor and gave it a circuit IBM called the central Arbitration Point. Transfers across the bus were managed by devices called bus masters, of which the microprocessor was but one. Others could operate from individual expansion slots. Multiple bus masters were permitted, and the bus provided a dynamic hierarchical method of assigning priorities and bus access to each. Far from stripping the microprocessor of power, however, this design lightened its overhead so that the microprocessor had more time for microprocessing. Although the Micro Channel design did little to improve performance of the bus, it gave the overall system more potential. The nominal bus clock was upped to 10 MHz, and the data path expanded to 32bits, providing a peak data rate of 20 MB/sec. IBM designed Micro Channel to be microprocessor-independent and operate asynchronously, so that the speed could be varied. Using what IBM called Matched Memory Cycles, some 32-bit memory boards operated at 16 MHz (peak data rate, 32 MB/sec). The new bus architecture required devices to negotiate for every access to the bus, for every transfer made. To cut this overhead, IBM added what it called a Burst Mode that permitted a single device to maintain control of the bus without renegotiation for up to about 12 milliseconds. Even with this Burst Mode, all Micro Channel transfers each still required two clock cycles - one for addressing; one for data transfer. The original Micro Channel was a full 32-bit design with 32-bit addressing that allowed up to 4 GB of memory on the bus, but initial IBM products only allowed 16 MB to be accessed by a computer's DMA controller. That limitation tied down Micro Channel with effective memory-handling capabilities no better than the AT bus because most products assume that DMA reaches all memory addresses. On the other hand, all Micro Channel expansion boards were required to decode all 65, 536 I/O ports addressable by Intel microprocessors. Although Micro Channel did not change the number of available interrupts, it allowed the existing interrupts to be shared. To facilitate sharing and improve reliability, interrupts were maintained by level-sensitive signals instead of being edge-triggered To prevent any attempt at using old bus cards in Micro Channel machines, IBM specified a new miniaturized connector for expansion boards. This incompatibility and the initial high royalty IBM demanded to use proprietary aspects of Micro Channel technology dampened enthusiasm for the new bus. Whereas most industry insiders viewed these measures as IBM trying to regain control of the PC market by promoting a proprietary standard, IBM actually documented Micro Channel more fully than it ever did the AT bus. Technically, Micro Channel rated as a masterstroke, essentially embodying the best of mainframe technology distilled down to PC size. But in a fit of corporate hubris, IBM tied use of MCA's proprietary technologies with hefty licensing fees that the rest of the PC industry, accustomed to taking advantage of IBM-developed technology for free, balked at. Moreover, IBM cursed Micro Channel with marketing so inept it might have besmirched the reputation of Florence Nightingale, and failed ever to satisfactorily explain why backward compatibility with PC and AT expansion boards was such an ill-considered concept. IBM's rationale was that the truly bad engineering behind the old bus and boards would hold back performance of new MCA systems. Advanced features, such as level-sensitive interrupts would not tolerate old boards that used edge-triggered interrupts. Starting with a brand new standard opened the opportunity for doing things right, entirely re-engineering the bus for optimum high speed operation and reliability. Most people, however, believed the Micro Channel design was more a means for IBM to steal back the industry by making the products of other manufacturers obsolete. Microchip Microcomputer MiniCAM Minicomputer Mixed-Mode Disc MO (Magneto-Optical) MotherBoard Mount MPEG MSCDEX MS-DOS Multi-function Drives Multimedia Multiprocessor MultiRead Multisession Disc Multi-tasking There are different types of multitasking. Cooperative multitasking requires a program to be written to allow other programs to access the system. In preemptive multitasking, the system can suspend any program to allow other programs access. Preemptive multitasking provides better performance, as programs can switch with less overhead. The Macintosh and Windows 3.1 use cooperative multitasking. Windows 95 and Unix use preemptive multitasking. The executing of more than one command at the same time. This allows programs to operate in parallel. Multi-threading The simultaneous accessing of data by more than one SCSI device. This increases the data throughput. MultiSync Multi-Volume
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